T8207-BAL-DT Agere Systems, Inc., T8207-BAL-DT Datasheet - Page 13

• Manufacturer Part Number: T8207-BAL-DT
• Description: CelXpres ATM interconnect. Dry-bagget, tape & reel .
• Manufacturer: Agere Systems, Inc.

Advance Data Sheet
September 2001
Agere Systems Inc.
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This section defines the CelXpres T8207 pins. All TTL compatible inputs or I/O are 5 V tolerant. No GTL+ inputs or
I/O are 5 V tolerant.
Table 1. UTOPIA Pins
u_rxaddr[4:0]
u_rxenb*[3:1]
u_txenb*[3:1]
u_rxdata[7:0]
u_txaddr[4:0]
u_txdata[7:0]
u_rxclav[3:1]
u_txclav[3:1]
u_rxenb*[0]
u_txenb*[0]
u_rxclav[0]
u_txclav[0]
Symbol
u_rxprty
u_shr_o
u_rxsoc
u_txprty
u_txsoc
u_shr_i
u_rxclk
u_txclk
Pin Description
R2, P3, R1, P2,
W20, V19, U19,
M17, M18, M19
V2, U3, T4, V1,
P17, R19, R20,
U18, T17, V20,
U2, T3, U1, T2
P20, N18, N19
M3, M2, M1
N3, N2, N1
P18, P19
U20, T18
W17
Ball
M20
R18
T20
N20
T19
V16
M4
P1
P4
R3
T1
L4
Reset
Value
—
—
—
—
—
—
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
1
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
RX UTOPIA Address Lines. 10 mA drive, TTL compatible I/O,
5 V tolerant.
RX UTOPIA Data Lines. TTL compatible input, 5 V tolerant.
RX UTOPIA Clock. 10 mA drive, TTL compatible I/O, 5 V tolerant.
RX UTOPIA Start of Cell (Active-High). TTL compatible input,
5 V tolerant.
RX UTOPIA PHY 0 Cell Available (Active-High). Main RX cell
available in single PHY mode. 10 mA drive, TTL compatible I/O, 5 V
tolerant. This pin has an internal 50 k
RX UTOPIA Cell Available Lines (Active-High). TTL compatible
input, 5 V tolerant. These pins have an internal 50 k
tor.
RX UTOPIA PHY 0 Enable (Active-Low). Main RX enable in sin-
gle PHY mode. 10 mA drive, TTL compatible I/O, 5 V tolerant.
RX UTOPIA PHY Enable Lines (Active-Low). 10 mA drive, TTL
compatible I/O, 5 V tolerant.
RX UTOPIA Odd Parity. TTL compatible input, 5 V tolerant. This
pin has an internal 50 k
TX UTOPIA Address Lines. 10 mA drive, TTL compatible I/O.
5 V tolerant.
TX UTOPIA Data Lines. 10 mA drive, TTL compatible output.
TX UTOPIA Clock. 10 mA drive, TTL compatible I/O, 5 V tolerant.
TX UTOPIA Start of Cell (Active-High). 10 mA drive, TTL compat-
ible output.
TX UTOPIA PHY 0 Cell Available (Active-High). Main TX cell
available in single PHY mode. 10 mA drive, TTL compatible I/O. 5 V
tolerant. This pin has an internal 50 k
TX UTOPIA Cell Available Lines (Active-High). TTL compatible
input, 5 V tolerant. These pins have an internal 50 k
tor.
TX UTOPIA PHY 0 Enable (Active-Low). Main TX enable in single
PHY mode. 10 mA drive, TTL compatible I/O, 5 V tolerant.
TX UTOPIA Enable Lines (Active-Low). 10 mA drive, TTL com-
patible output.
TX UTOPIA Odd Parity. 10 mA drive, TTL compatible output.
Shared UTOPIA Output. Used as grant if device is shared
UTOPIA master or as request if device is shared UTOPIA slave.
4 mA drive, TTL compatible output. This pin has an internal 50 k
pull-up resistor.
Shared UTOPIA Input. Used as request if device is shared
UTOPIA master or as grant if chip is shared UTOPIA slave. TTL
compatible input, 5 V tolerant. This pin has an internal 50 k
up resistor.
Name/Description
pull-up resistor.
pull-up resistor.
pull-up resistor.
ATM Interconnect
CelXpres T8207
pull-up resis-
pull-up resis-
pull-
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