T8207-BAL-DT Agere Systems, Inc., T8207-BAL-DT Datasheet - Page 150

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T8207-BAL-DT

Manufacturer Part Number
T8207-BAL-DT
Description
CelXpres ATM interconnect. Dry-bagget, tape & reel .
Manufacturer
Agere Systems, Inc.
Datasheet
CelXpres T8207
ATM Interconnect
19 Timing Requirements
WRITE_ACCESS_ACTIVE
1. write_access_active is the logical OR function of sel* and wr*_ds*.
2. Load is 50 pF.
Note: sel* and wr*_ds* must not have coinciding edges in opposite directions to prevent glitches on the write_access_active signal.
1. read_access_active is the logical OR function of sel* and rd*_wr*.
2. Load is 50 pF.
Note: sel* and rd*_wr* must not have coinciding edges in opposite directions prevent glitches on the read_access_active signals.
150
READ_ACCESS_ACTIVE
RDY_DTACK*
RDY_DTACK*
A[0]/ALE
A[0]/ALE
D[7:0]
D[7:0]
1
2
1
2
Figure 25. Multiplexed Intel Mode Write Access Timing
Figure 26. Multiplexed Intel Mode Read Access Timing
(continued)
t7
t3
t7
t3
t1
t1
t2
t2
t10
t10
t4
t4
t8
t8
t11
t6
t6
t5
t5
Advance Data Sheet
t9
t9
September 2001
t11
Agere Systems Inc.
t12
5-7791bF
5-7792bF

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