T8207-BAL-DT Agere Systems, Inc., T8207-BAL-DT Datasheet - Page 139
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T8207-BAL-DT
Manufacturer Part Number
T8207-BAL-DT
Description
CelXpres ATM interconnect. Dry-bagget, tape & reel .
Manufacturer
Agere Systems, Inc.
Datasheet
1.T8207-BAL-DT.pdf
(158 pages)
- Current page: 139 of 158
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Advance Data Sheet
September 2001
Agere Systems Inc.
14 Registers
Table 123. PHY Port X Multicast Memory (PPXMM) (0C20h to 0DE0h)
Note: When the T8207_sel bit = ‘0’ multicast memory at address 0D00h—0DECh are ignored.
multicast_receive_enable[15:0]
multicast_receive_enable[31:16]
multicast_receive_enable[47:32]
multicast_receive_enable[239:224]
multicast_receive_enable[255:240]
The letter X in the data structure and in the bit names represents the values of 1 through 15 for 15 of the 16 PHY
ports. The base addresses of the 15 multicast memory locations are shown below.
.
.
.
PHY Port 10 Multicast Memory
PHY Port 11 Multicast Memory
PHY Port 12 Multicast Memory
PHY Port 13 Multicast Memory
PHY Port 14 Multicast Memory
PHY Port 15 Multicast Memory
PHY Port 1 Multicast Memory
PHY Port 2 Multicast Memory
PHY Port 3 Multicast Memory
PHY Port 4 Multicast Memory
PHY Port 5 Multicast Memory
PHY Port 6 Multicast Memory
PHY Port 7 Multicast Memory
PHY Port 8 Multicast Memory
PHY Port 9 Multicast Memory
Name
Memory Name
(continued)
Offset Type Reset
1Ch
1Eh
00h
02h
04h
.
.
.
RW
X
This memory space contains 256 active-high enable
bits. Each bit represents a multicast net number from
0 through 255. If a bit is set, the corresponding multi-
cast net number data cell is sent to the queue group
for PHY port X. The least significant bit is multicast
net number 0.
Base Address
0CC0h
0DC0h
0CA0h
0CE0h
0DA0h
0DE0h
0C20h
0C40h
0C60h
0C80h
0D00h
0D20h
0D40h
0D60h
0D80h
Description
ATM Interconnect
CelXpres T8207
139
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