T8207-BAL-DT Agere Systems, Inc., T8207-BAL-DT Datasheet - Page 2
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T8207-BAL-DT
Manufacturer Part Number
T8207-BAL-DT
Description
CelXpres ATM interconnect. Dry-bagget, tape & reel .
Manufacturer
Agere Systems, Inc.
Datasheet
1.T8207-BAL-DT.pdf
(158 pages)
CelXpres T8207
ATM Interconnect
Contents
1
2
3
4
5
6
7
8
9
10 Cell Bus Interface..............................................................................................................................................54
2
Product Overview................................................................................................................................................1
1.1
1.2
1.3
1.4
1.5
Pin Description ..................................................................................................................................................13
Powerup/Reset Sequence ................................................................................................................................20
Hot Insertion......................................................................................................................................................21
PLL Configuration .............................................................................................................................................22
Microprocessor Interface ..................................................................................................................................23
6.1
6.2
6.3
General-Purpose I/O (GPIO) ............................................................................................................................26
Look-Up Table ..................................................................................................................................................27
8.1
8.2
8.3
8.4
8.5
8.6
UTOPIA Interface..............................................................................................................................................42
9.1
9.2
9.3
9.4
9.5
9.6
9.7
10.1 General Architecture ...............................................................................................................................54
10.2 Cell Bus Frames......................................................................................................................................56
10.3 Cell Bus Routing Headers .......................................................................................................................59
10.4 Cell Bus Arbitration..................................................................................................................................61
10.5 Cell Bus Monitoring .................................................................................................................................62
10.6 GTL+ Logic..............................................................................................................................................62
10.7 Cell Bus Write and Read Clocks .............................................................................................................63
Features ....................................................................................................................................................1
Applications ...............................................................................................................................................1
Description ................................................................................................................................................8
Conventions ............................................................................................................................................11
Glossary ..................................................................................................................................................12
Microprocessor Interface Configuration ..................................................................................................23
Microprocessor Interrupts........................................................................................................................23
Accessing the CelXpres T8207 via Microprocessor Interface.................................................................23
6.3.1
6.3.2
Look-Up Table RAM................................................................................................................................27
Organization ............................................................................................................................................28
Look-Up Procedure .................................................................................................................................33
Extended Records...................................................................................................................................36
Diagnostics..............................................................................................................................................41
Setup .......................................................................................................................................................41
Incoming UTOPIA Cell Interface .............................................................................................................43
9.1.1
9.1.2
Outgoing UTOPIA Cell Interface .............................................................................................................44
9.2.1
9.2.2
Counters..................................................................................................................................................46
55-Byte UTOPIA Mode............................................................................................................................47
Shared UTOPIA Mode ............................................................................................................................48
UTOPIA Pin Modes .................................................................................................................................50
UTOPIA Clocking ....................................................................................................................................53
10.3.1 Control Cells...............................................................................................................................59
10.3.2 Data Cells...................................................................................................................................60
10.3.3 Loopback Cells...........................................................................................................................60
10.3.4 Multicast Routing........................................................................................................................60
10.3.5 Broadcast Routing......................................................................................................................61
Accessing the Extended Memory Registers...............................................................................24
6.3.1.1 Extended Memory Writes.............................................................................................24
6.3.1.2 Extended Memory Reads.............................................................................................24
CelXpres T8207 Access Performance .......................................................................................25
Incoming PHY Mode (Cells Received by T8207) .......................................................................43
Incoming ATM Mode (Cells Received by T8207).......................................................................43
Outgoing PHY Mode (Cells Sent by T8207)...............................................................................44
Outgoing ATM Mode (Cells Sent by T8207) ..............................................................................45
Table of Contents
Advance Data Sheet
September 2001
Agere Systems Inc.
Page