T8207-BAL-DT Agere Systems, Inc., T8207-BAL-DT Datasheet - Page 148

• Manufacturer Part Number: T8207-BAL-DT
• Description: CelXpres ATM interconnect. Dry-bagget, tape & reel .
• Manufacturer: Agere Systems, Inc.

CelXpres T8207
ATM Interconnect
19 Timing Requirements
WRITE_ACCESS_ACTIVE
1. write_access_active is the logical OR function of sel*, wr*_ds*, and rd*_wr*.
2. Load is 50 pF.
Notes:
sel* and wr*_ds* must not have coinciding edges in opposite directions to prevent glitches on the write_access_active signal.
rd*_wr* must be stable any time both sel* and wr*_ds* are low to prevent glitches on the write_access_active signals.
1. read_access_active is the logical OR function of sel*, wr*_ds*, and rd*_wr*.
2. Load is 50 pF.
Notes:
sel* and wr*_ds* must not have coinciding edges in opposite directions to prevent glitches on the read_access_active signal.
rd*_wr* must be stable any time both sel* and wr*_ds* are low to prevent glitches on the read_access_active signals.
148
READ_ACCESS_ACTIVE
RDY_DTACK*
RDY_DTACK*
D[7:0]
A[7:0]
D[7:0]
A[7:0]
1
2
1
2
Figure 23. Motorola Mode Write Access Timing
Figure 24. Motorola Mode Read Access Timing
t4
t4
(continued)
t1
t1
t10
t5
t5
t8
t3
t3
t2
t2
t9
Advance Data Sheet
September 2001
t11
t6
t6
Agere Systems Inc.
t8
t7
t7
5-7789bF
5-7790bF