T8207-BAL-DT Agere Systems, Inc., T8207-BAL-DT Datasheet - Page 59

T8207-BAL-DT

Manufacturer Part Number

T8207-BAL-DT

Description

CelXpres ATM interconnect. Dry-bagget, tape & reel .

Manufacturer

Agere Systems, Inc.

Datasheet

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Advance Data Sheet

September 2001

Agere Systems Inc.

10 Cell Bus Interface

10.3 Cell Bus Routing Headers

The cell bus routing header gives information about the cell and its routing. There are seven different formats for

cell bus routing headers. See Figure 16. These headers cover broadcast, multicast, and single address routing. A

T8207 device on the cell bus accepts all broadcast cells and certain multicast cells that it is configured to accept.

Broadcast or multicast routed cells may be data cells or control cells. The T8207 receiving device accepts single

address cells with an address field in its cell bus routing header that matches the device’s unit address. Cells,

routed as single address, may be data, control, or loopback cells.

The H field (b0 to b3) is the cell bus routing header cyclic redundancy check (CRC-4) calculated over the other

12 bits (b4 to b15) of the header. It is provided for cell bus routing header error detection. When cells arrive from

the cell bus, the receiving device calculates the CRC-4 over the most significant 12 bits of the cell bus routing

header and compares its calculation to the CRC-4 value stored in the H field of the cell bus routing header. If the

two do not match, the cell is discarded.

10.3.1 Control Cells

The microprocessor connected to the T8207 may send control cells to the cell bus by writing the cell to the control

cell transmit direct memory at addresses A0h to D7h (or extended memory at addresses 0900h to 0936h). After

the cell is written to memory, the microprocessor sets the cntl_cell_wr bit in the main configuration/control register

(address 0110h). This bit returns to zero when the cell is transmitted and memory is available to load a new control

cell into the device.

Control cells accepted from the cell bus are routed to the control cell RX FIFO. The microprocessor connected to

the T8207 reads the control cell at the head of the FIFO using the control cell receive direct memory at addresses

60h to 93h (or extended memory at addresses 0800h to 0832h). After the microprocessor reads the cell, it sets the

cntl_cell_rd bit in the main configuration/control register (address 0110h) to remove the cell from the head of the

FIFO.

MULTICAST

CONTROL CELL HEADER

MULTICAST

DATA CELL HEADER

SINGLE DESTINATION

DATA CELL HEADER

SINGLE DESTINATION

CONTROL CELL HEADER

SINGLE DESTINATION

LOOPBACK CELL HEADER

BROADCAST

DATA CELL HEADER

BROADCAST

CONTROL CELL HEADER

b15

(continued)

b14

Figure 16. Cell Bus Routing Headers

b13

—

b12

—

b11

—

b10

—

MULTICAST NET NUMBER

—

UNIT ADDRESS

—

ATM Interconnect

CelXpres T8207

T8207-BAL-DT Agere Systems, Inc., T8207-BAL-DT Datasheet - Page 59

T8207-BAL-DT

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