AN2203 Freescale Semiconductor / Motorola, AN2203 Datasheet - Page 23

• Manufacturer Part Number: AN2203
• Description: MPC7450 RISC Microprocessor Family Software Optimization Guide
• Manufacturer: Freescale Semiconductor / Motorola

3.1.4
On the MPC7450, a bclr uses the link stack to predict the target. To use the link stack correctly, each
branch-and-link (bl) instruction must be paired with a branch-to-link-register (blr) instruction. Using the
architected LR for computed targets corrupts the link stack. A number of compilers are currently generating
code in this format.
In general, the CTR should be used for computed target addresses and the LR should be used only for
call/return addresses. If using the CTR for a loop conflicts with a computed goto, the computed goto should
be used and the loop should be converted to a GPR form.
Note that the PowerPC Compiler Writer’s Guide (Section 3.1.3.3) suggests using either CTR or LR for a
computed branch, and suggests that using the LR is acceptable when the CTR is used for a loop. This
suggestion is inappropriate for the MPC7450. For the MPC7450, the rules given in the preceding paragraphs
should be followed.
When generating position-independent code, many compilers use an instruction sequence such as the
following to obtain the current instruction address (CIA).
bcl 20,31,$+4
mflr r3
Note that this is not a true call and is not paired with a return. The MPC7450 is optimized so the link stack
ignores position-independent code when the bcl 20,31,$+4 form is used. This conditional call, which is used
only for putting the instruction address in a program-visible register, does not force a push on the link stack
and is treated as a non-taken branch.
3.1.4.1
The following code sequence is a common code sequence for a subroutine call/return sequence, where
main calls foo, foo calls ack, and ack possibly calls additional functions (not shown).
main:
5
foo:
0
1
2
3
4
MOTOROLA
...
mflr
stwu
bl
add
....
stwu
stwu
....
mflr
stwu
bl
add
....
lwzu
lwzu
lwzu
mtlr
bclr
Using the Link Register (LR) Versus the Count Register
(CTR) for Branch Indirect Instructions
Link Stack Example
MPC7450 RISC Microprocessor Family Software Optimization Guide
r5
r5,-4(r1)
foo
r3,r3,r20
r31,-4(r1)
r30,-4(r1)
r4
r4,-4(r1)
ack
r3,r3,r6
r30,4(r1)
r31,4(r1)
r5,4(r1)
r5
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Fetch/Branch Considerations
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