AN2203 Freescale Semiconductor / Motorola, AN2203 Datasheet - Page 61

• Manufacturer Part Number: AN2203
• Description: MPC7450 RISC Microprocessor Family Software Optimization Guide
• Manufacturer: Freescale Semiconductor / Motorola

Table A-3 lists system operation instruction latencies.
MOTOROLA
•
•
•
eieio
isync
mfmsr
mfspr (DBATs)
mfspr (IBATs)
mfspr (MSS)
mfspr (other)
mfspr (Time Base)
mfspr (VRSAVE)
mfsr
mfsrin
The variable ‘b’ represents the processor/system-bus clock ratio.
The term ‘broadcast’ indicates a bus broadcast that has a minimum value of 3*b.
Additional cycles due to serialization are indicated in the cycles column with the following:
— c (completion serialization)
— s (store serialization)
— y (sync serialization)
— e (execution serialization)
— r (refetch serialization)
Mnemonic
Branch execution takes at least 1 cycle, but if a branch executes before
reaching the dispatch point, it appears to execute in 0 cycles. On the
MPC7450, a conditional bclr instruction takes 2 cycles to execute.
MPC7450 RISC Microprocessor Family Software Optimization Guide
Table A-3. System Operation Instruction Execution Latencies
Table A-2. Branch Operation Execution Latencies
Freescale Semiconductor, Inc.
- NA -
- NA -
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
Unit
1
For More Information On This Product,
b[l][a]
bc[l][a]
bcctr[l]
bclr[l]
Branches that do not modify the LR or CTR can
be folded and not dispatched. Branches that are
dispatched go only to the CQ.
Mnemonic
MPC750
Go to: www.freescale.com
Cycles
2 {c,r}
- NA -
- NA -
3 {e}
1 {e}
3 {e}
1
1
3
1
3
NOTE
BPU
BPU
BPU
BPU
Unit
- NA -
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
SRU
Unit
LSU
MPC7400
2:3*b {y}
Cycles
2 {c,r}
- NA -
Cycles
3 {e}
1 {e}
1 {e}
3 {e}
1,2
1
3
1
3
1
1
1
1
1
1
1
MPC7450 Execution Latencies
Unit
LSU
—
IU2
IU2
IU2
IU2
IU2
IU2
IU2
IU2
IU2
1
MPC7450
Cycles
3:5 {s}
4:3{e}
5{e}
3{e}
5{e}
0{r}
3-2
4:3
3:2
4:3
4:3
2
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