AN2203 Freescale Semiconductor / Motorola, AN2203 Datasheet - Page 43

• Manufacturer Part Number: AN2203
• Description: MPC7450 RISC Microprocessor Family Software Optimization Guide
• Manufacturer: Freescale Semiconductor / Motorola

However, if hardware prefetching is enabled, the hardware starts prefetching the line desired by instruction
4 even before instruction 4 accesses (and misses) the L1 data cache, thus parallelizing some serialized bus
accesses. In Table 3-30, with prefetching enabled, performance is improved by about 40 percent. In this
case, the prefetch is not finished when instruction 4 goes to the L2 cache, so the load is forced to stall while
the prefetch bus access is completed. However, in other cases, the hardware prefetch is entirely finished,
allowing subsequent loads to have the access time of a L2 cache hit. In general, hardware prefetch benefits
are very dependent on what type of applications are run and how the system is configured.
Hardware prefetching is often preferable. However, sometimes an unnecessary prefetch transaction can
delay a later-arriving demand transaction and slow down the processor. Also, as described in Section 3.7.7,
“DST Instructions and the Vector Touch Engine (VTE),” if software prefetching is used, hardware
prefetching may sometimes provide more interference than benefit.
MOTOROLA
Instr.
No.
0
1
2
3
4
5
0
1
2
3
4
5
lwz r3,0x0(r9)
add r4,r3,r20
lwz r5,0x4(r9)
add r6,r5,r4
lwz r7,0x20(r9)
add r8,r7,r6
lwz r3,0x0(r9)
add r4,r3,r20
lwz r5,0x4(r9)
add r6,r5,r4
lwz r7,0x20(r9)
add r8,r7,r6
Instruction
MPC7450 RISC Microprocessor Family Software Optimization Guide
100–102
E0
E1
E0
Table 3-30. Hardware Prefetching Enable Example
D
D
0
I
I
Freescale Semiconductor, Inc.
For More Information On This Product,
103
E1
E0
E2
E1
1
I
I
Go to: www.freescale.com
Miss
Miss
104
E1
E0
C
2
E
LMQ0
LMQ0
3–81
105
Cycle Number
E1
E0
C
106–133
LMQ0
LMQ0
E1
E0
82
LMQ0/E2
LMQ0/E2
Memory Subsystem (MSS)
134
E1
E0
83
LMQ0/C
LMQ0/C
135
E1
E0
84
E
E
85–99
LMQ0
LMQ0
136
E1
E0
C
C
43