mt46h8m16lfcf-75-it Micron Semiconductor Products, mt46h8m16lfcf-75-it Datasheet - Page 35

• Manufacturer Part Number: mt46h8m16lfcf-75-it
• Description: 128mb Mobile Ddr Sdram Mt46h4m32lfb5-6
• Manufacturer: Micron Semiconductor Products

Table 17:
PDF: 09005aef8331b3e9 / Source: 09005aef8331b3ce
ddr_mobile_sdram_cmd_op_timing_dia_fr5.08__3.fm - Rev. B 06/08 EN
Any
Idle
Row activating,
active, or
precharging
Read
(auto precharge
disabled)
Write
(auto precharge
disabled)
Read
(with auto
precharge)
Write
(with auto
precharge)
Current State
Truth Table – Current State Bank n – Command to Bank m
Notes: 1–5; notes appear below and on next page
CS#
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
10. READs or WRITEs listed in the Command/Action column include READs or WRITEs with auto
11. Requires appropriate DM masking.
12. A WRITE command may be applied after the completion of the READ burst; otherwise, a
5. The following states must not be interrupted by any executable command; DESELECT or
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle, and bursts are not in progress.
8. May or may not be bank-specific; if multiple banks are to be precharged, each must be in a
9. Not bank-specific; BURST TERMINATE affects the most recent READ burst, regardless of
RAS#
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
NOP commands must be applied on each positive clock edge during these states.
Refreshing:
Accessing mode
register:
Precharging all:
valid state for precharging.
bank.
precharge enabled and READs or WRITEs with auto precharge disabled.
BURST TERMINATE must be used to end the READ burst prior to asserting a WRITE com-
mand.
CAS#
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
WE#
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
Starts with registration of an AUTO REFRESH command and ends when
t
idle state.
Starts with registration of a LOAD MODE REGISTER command and ends
when
will be in the all banks idle state.
Starts with registration of a PRECHARGE ALL command and ends when
t
RFC is met. After
RP is met. After
DESELECT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
Any command supported to bank m
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
t
MRD has been met. After
35
t
RP is met, all banks will be in the idle state.
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
RFC is met, the DDR SDRAM will be in the all banks
128Mb: x16, x32 Mobile DDR SDRAM
Command/Action
t
MRD is met, the Mobile DDR SDRAM
©2007 Micron Technology, Inc. All rights reserved.
Operations
Preliminary
5, 7, 3a
Notes
5, 3a
5, 3a
5, 3a
5, 7
5, 6
5
5
5
5