mt46h8m16lfcf-75-it Micron Semiconductor Products, mt46h8m16lfcf-75-it Datasheet - Page 50
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mt46h8m16lfcf-75-it
Manufacturer Part Number
mt46h8m16lfcf-75-it
Description
128mb Mobile Ddr Sdram Mt46h4m32lfb5-6
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT46H8M16LFCF-75-IT.pdf
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Figure 21:
PDF: 09005aef8331b3e9 / Source: 09005aef8331b3ce
ddr_mobile_sdram_cmd_op_timing_dia_fr5.08__3.fm - Rev. B 06/08 EN
Command
Command
Address
Address
DQS
DQS
CK#
CK#
DQ
DQ
CK
CK
Bank a, Col n
Bank a, Col n
READ Burst
READ
READ
T0
T0
Notes:
1. D
2. BL = 4.
3. Shown with nominal
Data from any READ burst must be completed or truncated before a subsequent WRITE
command can be issued. If truncation is necessary, the BURST TERMINATE command
must be used, as shown in Figure 26 on page 55. A READ burst may be followed by, or
truncated with, a PRECHARGE command to the same bank provided that auto
precharge was not activated. The PRECHARGE command should be issued x cycles after
the READ command, where x equals the number of desired data element pairs. This is
shown in Figure 27 on page 56. Following the PRECHARGE command, a subsequent
command to the same bank cannot be issued until
time is hidden during the access of the last data elements.
OUT
CL = 2
NOP
NOP
T1
T1
n = data-out from column n.
CL = 3
T1n
D
OUT
NOP
NOP
T2
T2
n
t
AC,
1
D
t
OUT
DQSCK, and
T2n
T2n
50
n + 1
D
D
OUT
OUT
NOP
NOP
T3
T3
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
n + 2
t
128Mb: x16, x32 Mobile DDR SDRAM
DQSQ.
D
OUT
D
T3n
T3n
OUT
n + 1
n + 3
t
D
RP is met. Part of the row precharge
OUT
NOP
NOP
Don’t Care
T4
T4
n + 2
D
OUT
©2007 Micron Technology, Inc. All rights reserved.
n + 3
Timing Diagrams
Transitioning Data
NOP
NOP
T5
T5
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