mt46h8m16lfcf-75-it Micron Semiconductor Products, mt46h8m16lfcf-75-it Datasheet - Page 79

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mt46h8m16lfcf-75-it

Manufacturer Part Number
mt46h8m16lfcf-75-it
Description
128mb Mobile Ddr Sdram Mt46h4m32lfb5-6
Manufacturer
Micron Semiconductor Products
Datasheet
Power-Down
Figure 49:
PDF: 09005aef8331b3e9 / Source: 09005aef8331b3ce
ddr_mobile_sdram_cmd_op_timing_dia_fr5.08__3.fm - Rev. B 06/08 EN
Power-Down Command (in Active or Precharge Modes)
Note:
Power-down (Figure 49 on page 79) is entered when CKE is registered LOW. If power-
down occurs when all banks are idle, this mode is referred to as precharge power-down;
if power-down occurs when there is a row active in any bank, this mode is referred to as
active power-down. Entering power-down deactivates all input and output buffers,
including CK and CK# and excluding CKE. Exiting power-down requires the device to be
at the same voltage as when it entered power-down and received a stable clock.
While in power-down, CKE LOW must be maintained at the inputs of the Mobile DDR
SDRAM, while all other input signals are “Don’t Care.” The power-down state is synchro-
nously exited when CKE is registered HIGH (in conjunction with a NOP or DESELECT
command). NOP or DESELECT commands must be maintained on the command bus
until
down command.
RAS#, CAS#, WE#
RAS#, CAS#, WE#
The power-down duration is limited by the refresh requirements of the device.
t
XP is satisfied. See Figure 50 on page 80 for a detailed illustration of the power-
BA0, BA1
Address
CKE
CK#
CS#
CS#
CK
BA0,1
Or
Don’t Care
79
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb: x16, x32 Mobile DDR SDRAM
©2007 Micron Technology, Inc. All rights reserved.
Timing Diagrams
Preliminary

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