mt46h8m16lfcf-75-it Micron Semiconductor Products, mt46h8m16lfcf-75-it Datasheet - Page 40
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mt46h8m16lfcf-75-it
Manufacturer Part Number
mt46h8m16lfcf-75-it
Description
128mb Mobile Ddr Sdram Mt46h4m32lfb5-6
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT46H8M16LFCF-75-IT.pdf
(84 pages)
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Figure 15:
PDF: 09005aef8331b3e9 / Source: 09005aef8331b3ce
ddr_mobile_sdram_cmd_op_timing_dia_fr5.08__3.fm - Rev. B 06/08 EN
Command
BA0, BA1
Address
V
DQS
DD
V
CK#
CKE
A10
DM
DQ
CK
DD
Q
1
Initialize and Load Mode Registers
Notes:
LVCMOS
HIGH LEVEL
Power-up: V
NOP 2
T = 200μs
2. NOP or DESELECT commands are required for at least 200µs.
3. Other valid commands are possible.
4. NOPs or DESELECTs are required during this time.
1. PRE = PRECHARGE command; LMR = LOAD MODE REGISTER command; AR = AUTO REFRESH
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DD
command; ACT = ACTIVE command
and CK stable
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NOP
T0
High-Z
High-Z
t IH
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CH
t
CK
t
CL
ALL BANKS
t
IS
PRE
T1
t
IH
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RP
4
AR
Ta0
40
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4
Tb0
AR
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb: x16, x32 Mobile DDR SDRAM
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Load standard
mode register
4
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Op-code
Op-code
BA0 = L,
IS
IS
IS
BA1 = L
Tc0
LMR
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IH
IH
IH
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Load extended
mode register
4
Op-code
Op-code
BA0 = L,
BA1 = H
LMR
Td0
©2007 Micron Technology, Inc. All rights reserved.
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MRD
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4
Te0
ACT 3
Row
Row
Bank
Operations
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Preliminary
Don’t Care
NOP 3
Tf0
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