ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 178
ep1agx50d
Manufacturer Part Number
ep1agx50d
Description
Arria Gx Device Data Sheet
Manufacturer
Altera Corporation
Datasheet
1.EP1AGX50D.pdf
(296 pages)
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Operating Conditions
4–24
Arria GX Device Handbook, Volume 1
Note to
(1)
V
V
V
R
V
V
V
V
ΔV
V
ΔV
V
R
R
Table 4–21. 3.3-V LVDS I/O Specifications (Part 2 of 2)
Table 4–22. 3.3-V PCML Specifications
Symbol
ICM
OD
OCM
CCIO
ID
ICM
OD
O C M
T
L
1
2
Symbol
OD
O C M
The top and bottom clock input differential buffers in I/O banks 3, 4, 7, and 8 are powered by V
The PLL clock output/feedback differential buffers are powered by VCC_PLL_OUT. For differential clock
output/feedback operation, connect VCC_PLL_OUT to 3.3 V.
Table
Input common mode voltage
Output differential voltage
(single-ended)
Output common mode
voltage
Receiver differential input
discrete resistor (external to
Arria GX devices)
4–21:
I/O supply voltage
Input differential voltage
swing (single-ended)
Input common mode
voltage
Output differential voltage
(single-ended)
Change in V
high and low
Output common mode
voltage
Change in V
high and low
Output termination voltage
Output external pull-up
resistors
Output external pull-up
resistors
Parameter
Parameter
O D
O C M
between
between
R
R
L
L
= 100 Ω
= 100 Ω
Conditions
Conditions
Minimum
Minimum
200
250
840
3.135
90
300
300
1.5
2.5
45
45
Typical
V
Typical
2.85
1,250
370
C C I O
3.3
100
50
50
Maximum
Altera Corporation
3.465
3.465
Maximum
600
500
3.3
50
50
55
55
CCINT
1,800
1,570
710
110
, not V
May 2008
Units
mV
mV
mV
mV
CCIO
V
V
V
V
Ω
Ω
Unit
mV
mV
mV
Ω
.
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