ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 194

• Manufacturer Part Number: ep1agx50d
• Description: Arria Gx Device Data Sheet
• Manufacturer: Altera Corporation

I/O Timing Model
4–40
Arria GX Device Handbook, Volume 1
LVTTL
LVCMOS
2.5 V
1.8 V
1.5 V
PCI
PCI-X
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.8-V HSTL Class I
Table 4–45. Timing Measurement Methodology for Input Pins
(6)
(5)
(5)
(5)
(6)
(5)
(5)
I/O Standard
Figure 4–9. Measurement Setup for t
Table 4–45
Din
Din
OE
OE
specifies the input timing measurement setup.
V
CCIO
3.135
3.135
2.375
1.710
1.425
2.970
2.970
2.325
2.325
1.660
1.660
1.660
(V)
Measurement Conditions
t
t
1 MΩ
1 MΩ
ZX
ZX
V
, Tristate to Driving High
Dout
, Tristate to Driving Low
Dout
1.163
1.163
0.830
0.830
0.830
REF
(V)
Notes
zx
Dout
Dout
Din
Din
OE
OE
Edge Rate (ns)
(1), (2), (3),
Disable
Disable
3.135
3.135
2.375
1.710
1.425
2.970
2.970
2.325
2.325
1.660
1.660
1.660
Enable
Enable
½ V
½ V
(4)
CCINT
CCINT
Measurement Point
t
t
zh
zl
(Part 1 of 2)
Altera Corporation
VMEAS (V)
1.5675
1.5675
1.1875
0.7125
1.1625
1.1625
0.855
1.485
1.485
0.83
0.83
0.83
May 2008
½ V
½ V
“1”
“0”
CCIO
CCIO