ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 5

• Manufacturer Part Number: ep1agx50d
• Description: Arria Gx Device Data Sheet
• Manufacturer: Altera Corporation

Altera Corporation
May 2008
Source-
synchronous
receive
channels
Source-
synchronous
transmit
channels
M512 RAM
blocks (32 ×
18 bits)
M4K RAM
blocks (128 ×
36 bits)
M-RAM
blocks (4096
× 144 bits)
Total RAM
bits
Embedded
multipliers
(18 × 18)
DSP blocks
PLLs
Maximum
user I/O pins
Table 1–1. Arria GX Device Features (Part 2 of 2)
Feature
EP1AGX20C
1,229,184
230, 341
166
118
31
29
40
10
C
1
4
Arria GX devices are available in space-saving FBGA packages (refer to
Table
same package. With vertical migration support, designers can migrate to
devices whose dedicated pins, configuration pins, and power pins are the
same for a given package across device densities. For I/O pin migration
230
EP1AGX35C/D
31
29
C
1,348,416
1–2). All Arria GX devices support vertical migration within the
197
140
56
14
1
4
341
31
29
D
EP1AGX50C/D
229
31
29
C
4
2,475,072
313
242
104
26
2
350, 514
31, 42
29, 42
4, 8
D
Arria GX Device Handbook, Volume 1
229
31
29
C
EP1AGX60C/D/E
2,528,640
4
326
252
128
32
350
2
31
29
D
514
42
42
E
8
EP1AGX90E
4,477,824
Features
478
400
176
538
47
45
44
E
4
8
1–3