mt90528ag2 Zarlink Semiconductor, mt90528ag2 Datasheet - Page 156
mt90528ag2
Manufacturer Part Number
mt90528ag2
Description
28-port Primary Rate Circuit Emulation Aal1 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90528AG2.pdf
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Address: 6200 + p*10 (Hex)
Label: TDM1_Pp (where p represents the port number)
Reset Value: 0000 (Hex)
TDM_CLK_MODE
TDM_LINK_TYPE
TDM_MAPPING_
TDM_CLK_RATE
TDM_CLK_POL
TDM_PULSE_
TDM_PULSE_
TDM_BUS_
INT_LOS_
ENABLE
MODE
Label
SCH
POL
SEL
Position
Bit
10
11
12
4
5
6
7
9
8
Table 84 - TDM Control Register 1 (one per port)
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
TDM Mapping Scheme. (Applies only to an incoming DS1 link in SDT mode.)
In Generic mode:
‘0’ = Use first 24 channels.
‘1’ = Use 3 channels out of every 4.
In ST-BUS mode, this bit must be cleared.
TDM Frame Pulse Selection. (Applies only to SDT mode.)
‘0’ = STiMF pin is a frame pulse.
‘1’ = STiMF pin is a multiframe pulse.
In Backplane SDT mode, this bit must cleared.
TDM Frame Pulse Polarity. (Applies only to SDT mode.)
In Generic mode:
‘0’ = Negative polarity.
‘1’ = Positive polarity.
In ST-BUS mode, this bit must be cleared.
Segmentation TDM Input Clock Polarity.
‘0’ = TDM data is sampled on the rising edge.
‘1’ = TDM data is sampled on the falling edge.
In ST-BUS SDT mode, this bit must be set.
TDM Clock Rate.
‘0’ = TDM clock is 1.544 MHz.
‘1’ = TDM clock is 2.048 MHz or 4.096 MHz.
TDM Link Type.
‘0’ = E1 link.
‘1’ = DS1 link.
Internal LOS Enable (Applies only to UDT mode).
‘0’ = Internal version of LOS disabled.
‘1’ = Internal version of LOS enabled.
If this bit is set, the occurrence of an LOS event on the port will be propagated throughout
the device, possibly influencing the signals output on PRI_REF, PRI_LOS, and the port’s
SToCLK.
This bit must be set if TDM_LOS_CLK (bit<1>) is set.
TDM Clocking Mode. (Applies only to SDT mode; must be cleared in UDT mode.)
‘0’ = Independent mode (Independent clocks and frame pulses)
‘1’ = Backplane mode (Common clock and frame pulse)
TDM Bus Mode (Applies only to SDT mode; must be cleared in UDT mode.)
‘0’ = Generic.
‘1’ = ST-BUS. (The clock is 4.096 MHz.)
Zarlink Semiconductor Inc.
MT90528
156
Description
Data Sheet
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