mt90528ag2 Zarlink Semiconductor, mt90528ag2 Datasheet - Page 66

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mt90528ag2

Manufacturer Part Number
mt90528ag2
Description
28-port Primary Rate Circuit Emulation Aal1 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
4.6
The RX_SAR modules of the MT90528 device (consisting of the UDT RX_SAR, the SDT RX_SAR, and the Data
RX_SAR) are primarily responsible for the reassembly of TDM data extracted from CBR ATM cells. In addition, in
certain modes of operation, the SDT RX_SAR extracts CAS data from received cells and sends that information, as
well as multiframe indication signals, to the TDM module.
The UDT RX_SAR and SDT RX_SAR modules provide the Clock Management module with clocking information
obtained from received cells.
RX_SAR Modules
+40*n+36 to
+40*n+3E
+76 to +7E
+36 to +3E
Byte
Add
+40*n
Figure 25 - TX_SAR Cell Template - Data Cell (Non-CBR) Mode
+34
+74
+00
+02
+04
+06
+40
+42
+44
+46
15
14
GFC
GFC
GFC
Note: The Transmit Data Cell Buffer can
hold from 16 to 128 non-CBR cells,
depending on the user-programmable
configuration. n = number of cells - 1.
13
12
HEC
HEC
HEC
11
10
VCI
VCI
VCI
Payload Word 24
Payload Word 24
Payload Word 24
Payload Word 1
Payload Word 1
Payload Word 1
9
Reserved
Reserved
Reserved
8
VPI
VPI
VPI
7
Zarlink Semiconductor Inc.
6
MT90528
5
UDF2
UDF2
UDF2
4
3
66
PTI
PTI
PTI
2
VCI
VCI
VCI
1
0
C
C
C
+00
+01
+02
+03
+20
+21
+22
+23
+3B to +3F
+1A
+1B to +1F
+3A
+20*n
+20*n+1B to
Word
Add
+20*n+1F
second cell
final cell
first cell
Data Sheet

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