mt90528ag2 Zarlink Semiconductor, mt90528ag2 Datasheet - Page 9
mt90528ag2
Manufacturer Part Number
mt90528ag2
Description
28-port Primary Rate Circuit Emulation Aal1 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90528AG2.pdf
(195 pages)
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MT90528
Data Sheet
List of Tables
Table 97 - TDM Bus Input Clock Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
Table 98 - TDM Bus Input Data Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
Table 99 - TDM Bus Output Clock Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
Table 100 - TDM Bus Data Output Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
Table 101 - UTOPIA Level 1 Interface Timing - ATM mode - Incoming Data (UTOPIA RX Bus) . . . . . . . . . . . . . 176
Table 102 - UTOPIA Level 1 Interface Timing - ATM mode - Outgoing Data (UTOPIA TX Bus) . . . . . . . . . . . . . 177
Table 103 - UTOPIA Level 1 Interface Timing - PHY mode - Incoming Data (UTOPIA TX Bus) . . . . . . . . . . . . . 178
Table 104 - UTOPIA Level 1 Interface Timing - PHY mode - Outgoing Data (UTOPIA RX Bus). . . . . . . . . . . . . 179
Table 105 - UTOPIA Level 2 Interface Timing - PHY mode - Incoming Data (UTOPIA TX Bus) . . . . . . . . . . . . . 180
Table 106 - UTOPIA Level 2 Interface Timing - PHY mode - Outgoing Data (UTOPIA RX Bus). . . . . . . . . . . . . 181
Table 107 - MT90528 UTOPIA Signal Directions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
Table 108 - Segmentation Latency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
Table 109 - Reassembly Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
Table 110 - End-to-End Latency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
9
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