mt90528ag2 Zarlink Semiconductor, mt90528ag2 Datasheet - Page 52
mt90528ag2
Manufacturer Part Number
mt90528ag2
Description
28-port Primary Rate Circuit Emulation Aal1 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90528AG2.pdf
(195 pages)
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When operating in Level 1 mode, the ATM Forum only specifies UTO_IN_CLK to a maximum clock speed of 25
MHz. However, the user is able to use the interface at speeds of up to 52 MHz, if desired.
OAM & VPI/VCI Filter
The role of the OAM & VPI/VCI filter sub-module is to limit unnecessary VPI/VCI comparison and look-up table
accesses. The filter allows only certain cells to be written into the Receive UTOPIA FIFO of the MT90528 and
discards unwanted cells. Unwanted cells fall into three categories:
•
•
•
The filter considers the headers of cells received at the RX UTOPIA Interface; if cells pass through the Match and
Match Enable filters successfully, the “accepted” cells are written to the RX UTOPIA FIFO.
The operation of OAM & VPI/VCI filter sub-module can be summarized by the flow chart in Figure 16.
null cells (i.e., cells with VPI = 0 and VCI = 0); these cells are automatically discarded.
cells whose VPI and/or VCI fall outside the Match and Match Enable filters which are configured via the
registers at byte addresses 4008h - 400Ch.
OAM cells (i.e., cells where the most significant bit of the PTI field in the cell header is set). OAM cells are
discarded if the user clears the GLOBAL_OAM_SEL bit in the UTOPIA Configuration Register at 4000h
Zarlink Semiconductor Inc.
MT90528
52
Data Sheet
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