mt90528ag2 Zarlink Semiconductor, mt90528ag2 Datasheet - Page 46

• Manufacturer Part Number: mt90528ag2
• Description: 28-port Primary Rate Circuit Emulation Aal1 Sar
• Manufacturer: Zarlink Semiconductor

Underrun Detection in SDT Mode
The SDT TDM reassembly process reads data which was written to the SDT Reassembly Circular Buffers by the
SDT RX_SAR block. Because the SDT RX_SAR and the TDM module don’t operate at the same rate (i.e., data is
written to the buffers based on the cell arrival rate while data is read from the buffers at a constant rate determined
by the TDM output clock rate), there is a possibility of underruns. The SDT TDM reassembly process therefore
performs underrun detection. The SDT TDM reassembly process compares the two most significant bits of the
TDM channel’s read pointer with the two bits called “turn” which are stored in the SDT Reassembly Circular Buffer
entries:
Byte
Add
+00
+02
+3C
+3E
+3A
15
V
V
V
V R I R
V R I R
U
U
S
U
S
S
Buffer Size
I P
I
I P
1024 entries
128 entries
256 entries
512 entries
64 entries
U
U
U
P
Res
Res
Res
Res
Res
Table 11 - Formation of the Reassembly Circular Buffer Base Address
Add. and Size (Port 0, Ch. 29)
Add. and Size (Port 0, Ch. 30)
Add. and Size (Port 0, Ch. 31)
Add. and Size (Port 0, Ch. 0)
Add. and Size (Port 0, Ch. 1)
9
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Structure of the Reassembly Circular Buffer Address and Size Fields
{TDM_REASS_BASE_ADD, Reassembly Circ. Buffer Add. and Size<9:1>, 6’b0}
{TDM_REASS_BASE_ADD, Reassembly Circ. Buffer Add. and Size<9:2>, 7’b0}
{TDM_REASS_BASE_ADD, Reassembly Circ. Buffer Add. and Size<9:3>, 8’b0}
{TDM_REASS_BASE_ADD, Reassembly Circ. Buffer Add. and Size<9:4>, 9’b0}
{TDM_REASS_BASE_ADD, Reassembly Circ. Buffer Add. and Size<9:5>, 10’b0}
Figure 13 - TDM SDT Reassembly Control Structure
Address - 1024-entry buffer (5 bits)
0
9
Reassembly Circular Buffer Address
Reassembly Circular Buffer
Reassembly Circular Buffer Address
Word
+1D
Add
+1F
+1E
+00
+01
Reassembly Circular Buffer Address
512-entry buffer (6 bits)
Zarlink Semiconductor Inc.
256-entry buffer (7 bits)
Reassembly Circular Buffer Address
128-entry buffer (8 bits)
Address to External Memory
MT90528
64-entry buffer (9 bits)
V (Valid): If this bit is set, the channel’s output on DSTo and CSTo is valid. If this
bit is ‘0’, the channel’s output on DSTo and CSTo is tristated. Should be used for
mapping DS1 channels in 2.048 Mbps mode.
SU (Simple Underrun Service Enable): If this bit is set and a simple underrun is
detected, a status bit is set and the underrunning channel is reported in the port’s
TDM Control Register 4.
I (Idle Enable): If this bit is set, idle data (user-programmable via Main TDM Con-
trol Register 2) will be output on DSTo for the channel’s duration.
PU (Permanent Underrun Enable): If this bit is set and a permanent underrun is
detected, a status bit is set in the port’s TDM Control Register 4 and the under-
running channel is reported in the port’s TDM Control Registers 5 & 6.
Res, R (Reserved): Unused. Must be set to 0.
Reassembly Circular Buffer Address & Size. The size field of this entry indi-
cates if the Circular Buffer is 64, 128, 256, 512 or 1024 entries long. The leading
bits in the field, when appended with a number of least-significant zeroes, indi-
cate the Reassembly Circular Buffer word address, as shown in the drawing
below.
46
1 0 0 0 0
1 0 0 0
1 0 0
1 0
1
0
Data Sheet