SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 114
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SC9S12XS256J1MAA
Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.SC9S12XS256J1MAA.pdf
(736 pages)
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1
1
Port Integration Module (S12XSPIMV1)
2.3.65
2.3.66
114
Function
Address 0x026F
Address 0x0270
PT0AD0
7-6, 1-0
Read: Anytime.
Write: Anytime.
Read: Anytime. The data source depends on the data direction value.
Write: Anytime.
Altern.
Field
Field
PIFJ
Reset
Reset
7-0
W
W
R
R
PT0AD07
Port J interrupt flag—
The flag bit is set after an active edge was applied to the associated input pin. This can be a rising or a falling edge
based on the state of the polarity select register.
Writing a logic “1” to the corresponding bit field clears the flag.
1 Active edge on the associated bit has occurred (an interrupt will occur if the associated enable bit is set)
0 No active edge occured
Port AD0 general purpose input/output data—Data Register, ATD AN analog input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
PIFJ7
AN15
Port J Interrupt Flag Register (PIFJ)
Port AD0 Data Register 0 (PT0AD0)
0
0
7
7
PT0AD06
PIFJ6
AN14
0
0
6
6
Figure 2-63. Port J Interrupt Flag Register (PIFJ)
Figure 2-64. Port AD0 Data Register 0 (PT0AD0)
Table 2-63. PT0AD0 Register Field Descriptions
Table 2-62. PIFJ Register Field Descriptions
S12XS Family Reference Manual, Rev. 1.09
PT0AD05
AN13
0
0
0
5
5
PT0AD04
AN12
0
0
0
4
4
Description
Description
PT0AD03
AN11
3
0
0
3
0
PT0AD02
AN10
0
0
0
2
2
PT0AD01
Freescale Semiconductor
Access: User read/write
Access: User read/write
PIFJ1
AN9
0
0
1
1
PT0AD00
PIFJ0
AN8
0
0
0
0
1
1
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