SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 248

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SC9S12XS256J1MAA

Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
S12XE Clocks and Reset Generator (S12XECRGV1)
8.3.2.10
Read: Always read $00 except in special modes
Write: Only in special modes
8.3.2.11
Read: Always read $00 except in special modes
248
Module Base + 0x0009
Module Base + 0x000A
Reset
Reset
W
W
R
R
Reserved Register (FORBYP)
Reserved Register (CTCTL)
0
0
0
0
7
7
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special
modes can alter the S12XECRG’s functionality.
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special test
modes can alter the S12XECRG’s functionality.
= Unimplemented or Reserved
= Unimplemented or Reserved
1
OSCCLK cycles are referenced from the previous COP time-out reset
(writing $55/$AA to the ARMCOP register)
CR2
0
0
0
0
6
6
1
Figure 8-12. Reserved Register (FORBYP)
Figure 8-13. Reserved Register (CTCTL)
S12XS Family Reference Manual, Rev. 1.09
CR1
Table 8-13. COP Watchdog Rates
1
0
0
0
0
5
5
CR0
1
NOTE
NOTE
0
0
0
0
4
4
Cycles to Timeout
0
0
0
0
3
3
OSCCLK
2
24
1
0
0
0
0
2
2
Freescale Semiconductor
0
0
0
0
1
1
0
0
0
0
0
0

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