SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 693
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SC9S12XS256J1MAA
Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.SC9S12XS256J1MAA.pdf
(736 pages)
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In
In
Freescale Semiconductor
(CPOL = 0)
(CPOL = 1)
1
Figure A-7
Table A-27
Num
See
10
11
12
13
1
1
2
3
4
5
6
9
(Output)
(Output)
(Output)
(Output)
1.If configured as output
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1,bit 2... MSB.
(Input)
MISO
MOSI
Figure
SCK
SCK
SS
C
D
D
D
D
D
D
D
D
D
D
D
D
A-8.
the timing diagram for master mode with transmission format CPHA=1 is depicted.
Port Data
the timing characteristics for master mode are listed.
SCK frequency
SCK period
Enable lead time
Enable lag time
Clock (SCK) high or low time
Data setup time (inputs)
Data hold time (inputs)
Data valid after SCK edge
Data valid after SS fall (CPHA = 0)
Data hold time (outputs)
Rise and fall time inputs
Rise and fall time outputs
9
2
Master MSB OUT2
4
Table A-27. SPI Master Mode Timing Characteristics
5
Characteristic
MSB IN2
1
Figure A-7. SPI Master Timing (CPHA = 1)
S12XS Family Reference Manual, Rev. 1.09
6
4
12
12
Bit MSB-1. . . 1
11
Bit MSB-1. . . 1
Symbol
t
t
t
wsck
t
f
t
t
lead
vsck
t
t
t
t
sck
sck
t
vss
lag
su
ho
rfo
hi
rfi
13
Master LSB OUT
13
1/2048
Min
20
—
—
—
—
—
—
—
2
8
8
LSB IN
Typ
1/2
1/2
1/2
—
—
—
—
—
—
—
—
—
3
Electrical Characteristics
2048
Max
1/2
Port Data
29
15
—
—
—
—
—
—
8
8
1
Unit
f
t
t
t
t
ns
ns
ns
ns
ns
ns
ns
bus
bus
sck
sck
sck
693
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