SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 494
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SC9S12XS256J1MAA
Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.SC9S12XS256J1MAA.pdf
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Voltage Regulator (S12VREGL3V3V1)
17.3.2.2
The VREGCTRL register allows the configuration of the VREG_3V3 low-voltage detect features.
494
0x02F1
Reset
LVDS
Field
LVIE
LVIF
2
1
0
W
R
Low-Voltage Detect Status Bit — This read-only status bit reflects the input voltage. Writes have no effect.
0 Input voltage V
1 Input voltage V
Low-Voltage Interrupt Enable Bit
0 Interrupt request is disabled.
1 Interrupt will be requested whenever LVIF is set.
Low-Voltage Interrupt Flag — LVIF is set to 1 when LVDS status bit changes. This flag can only be cleared by
writing a 1. Writing a 0 has no effect. If enabled (LVIE = 1), LVIF causes an interrupt request.
0 No change in LVDS bit.
1 LVDS bit has changed.
Note: On entering the Reduced Power Mode the LVIF is not cleared by the VREG_3V3.
Control Register (VREGCTRL)
0
0
7
= Unimplemented or Reserved
0
0
6
DDA
DDA
is above level V
is below level V
Figure 17-2. Control Register (VREGCTRL)
Table 17-5. VREGCTRL Field Descriptions
S12XS Family Reference Manual, Rev. 1.09
0
0
5
LVIA
LVID
and FPM.
or RPM or shutdown mode.
0
0
4
Description
0
0
3
LVDS
0
2
Freescale Semiconductor
LVIE
0
1
LVIF
0
0
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