SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 56

no-image

SC9S12XS256J1MAA

Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Device Overview S12XS Family
1.9
The XCLKS is an input signal which controls whether a crystal in combination with the internal loop
controlled (low power) Pierce oscillator is used or whether full swing Pierce oscillator/external clock
circuitry is used.
The XCLKS signal selects the oscillator configuration during reset low phase while a clock quality check
is ongoing. This is the case for:
The selected oscillator configuration is frozen with the rising edge of the RESET pin in any of these above
described reset cases.
56
Power on reset or low-voltage reset
Clock monitor reset
Any reset while in self-clock mode or full stop mode
Oscillator Configuration
Figure 1-7. Loop Controlled Pierce Oscillator Connections (XCLKS = 1)
Figure 1-8. Full Swing Pierce Oscillator Connections (XCLKS = 0)
MCU
Figure 1-9. External Clock Connections (XCLKS = 0)
EXTAL
XTAL
MCU
MCU
S12XS Family Reference Manual, Rev. 1.09
EXTAL
EXTAL
XTAL
R
XTAL
B
=1MΩ ; R
R
S
R
B
S
Not Connected
specified by crystal vendor
Ceramic Resonator
Crystal or
CMOS-Compatible
External Oscillator
C
C
Ceramic Resonator
1
2
Crystal or
C
C
1
2
V
SSPLL
V
SSPLL
Freescale Semiconductor

Related parts for SC9S12XS256J1MAA