SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 81

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SC9S12XS256J1MAA

Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1
2.3.14
2.3.15
This register is reserved for factory testing of the PIM module and is not available in normal operation.
Writing to this register when in special modes can alter the pin functionality.
1. Implementation pim_xe.01.01 and later
Freescale Semiconductor
Address 0x001E
Address 0x001F
Read: See individual bit descriptions below.
Write: See individual bit descriptions below.
IRQEN
IRQE
Field
Reset
Reset
7
6
W
W
R
R
IRQ select edge sensitive only—
Special mode: Read or write anytime.
Normal mode: Read anytime, write once.
1 IRQ configured to respond only to falling edges. Falling edges on the IRQ pin will be detected anytime IRQE=1
0 IRQ configured for low level recognition.
IRQ enable—
Read or write anytime.
1 IRQ pin is connected to interrupt logic.
0 IRQ pin is disconnected from interrupt logic.
IRQE
IRQ Control Register (IRQCR)
PIM Reserved Register PIMTEST
and will be cleared only upon a reset or the servicing of the IRQ interrupt.
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
IRQEN
1
0
0
6
6
Table 2-13. IRQCR Register Field Descriptions
Figure 2-12. IRQ Control Register (IRQCR)
S12XS Family Reference Manual, Rev. 1.09
Figure 2-13. PIM Reserved Register
0
0
0
0
5
5
0
0
0
0
4
4
Description
1
3
0
0
3
0
0
0
0
0
0
Port Integration Module (S12XSPIMV1)
2
2
Access: User read/write
0
0
0
0
1
1
Access: User read
0
0
0
0
0
0
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1
1

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