SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 71
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SC9S12XS256J1MAA
Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.SC9S12XS256J1MAA.pdf
(736 pages)
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2.3.2
The following table summarizes the effect of the various configuration bits, i.e. data direction (DDR),
output level (IO), reduced drive (RDR), pull enable (PE), pull select (PS) on the pin function and pull
device activity.
The configuration bit PS is used for two purposes:
Freescale Semiconductor
RDR1AD0
PER0AD0
PER1AD0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Register
0x027C
0x027D
0x027A
0x027B
0x027E
0x027F
0x0275
0x0276
0x0277
0x0278
0x0279
Name
1. Configure the sensitive interrupt edge (rising or falling), if interrupt enabled.
2. Select either a pull-up or pull-down device if PE is active.
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
Register Descriptions
RDR1AD07 RDR1AD06 RDR1AD05 RDR1AD04 RDR1AD03 RDR1AD02 RDR1AD01 RDR1AD00
PER0AD07
PER1AD07
Bit 7
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
PER0AD06
PER1AD06
6
0
0
0
0
0
0
0
0
S12XS Family Reference Manual, Rev. 1.09
PER0AD05
PER1AD05
5
0
0
0
0
0
0
0
0
PER0AD04
PER1AD04
4
0
0
0
0
0
0
0
0
PER0AD03
PER1AD03
3
0
0
0
0
0
0
0
0
PER0AD02
PER1AD02
Port Integration Module (S12XSPIMV1)
2
0
0
0
0
0
0
0
0
PER0AD01
PER1AD01
1
0
0
0
0
0
0
0
0
PER0AD00
PER1AD00
Bit 0
0
0
0
0
0
0
0
0
71
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