SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 57
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SC9S12XS256J1MAA
Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.SC9S12XS256J1MAA.pdf
(736 pages)
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Chapter 2
Port Integration Module (S12XSPIMV1)
Revision History
2.1
2.1.1
The S12XS family Port Integration Module establishes the interface between the peripheral modules and
the I/O pins for all ports. It controls the electrical pin properties as well as the signal prioritization and
multiplexing on shared pins.
This document covers:
Most I/O pins can be configured by register bits to select data direction and drive strength, to enable and
select pull-up or pull-down devices.
Freescale Semiconductor
Revision
Number
V01.03
V01.04
V01.05
•
•
•
•
•
•
•
•
Port A, B and K used as general purpose I/O
Port E associated with the IRQ, XIRQ interrupt inputs
Port T associated with 1 timer module
Port S associated with 2 SCI module and 1 SPI module
Port M associated with 1 MSCAN
Port P connected to the PWM - inputs can be used as an external interrupt source
Port H and J used as general purpose I/O - inputs can be used as an external interrupt source
Port AD associated with one 16-channel ATD module
Introduction
Revision Date
Overview
23 Nov 2007
31 Mar 2009
02 Apr 2008
Sections
Affected
S12XS Family Reference Manual, Rev. 1.09
Changed PTTRR register description.
Corrected reduced drive strength to 1/5
Separated PE1,0 bit descriptions from other PE GPIO
Corrected PERJ bit description
Orthographical corrections
Description of Changes
57
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