SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 239

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SC9S12XS256J1MAA

Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Read: Anytime
Write: Anytime except if PLLSEL = 1
8.3.2.4
This register provides S12XECRG status bits and flags.
Read: Anytime
Write: Refer to each bit for individual write conditions
Freescale Semiconductor
1. PORF is set to 1 when a power on reset occurs. Unaffected by system reset.
2. LVRF is set to 1 when a low voltage reset occurs. Unaffected by system reset.
3. ILAF is set to 1 when an illegal address reset occurs. Unaffected by system reset. Cleared by power on or low voltage reset.
Module Base + 0x0002
Module Base + 0x0003
Reset
Reset
W
W
R
R
f PLL
RTIF
S12XECRG Flags Register (CRGFLG)
0
0
0
7
=
7
If POSTDIV = $00 then f
------------------------------------- -
(
2xPOSTDIV
f VCO
= Unimplemented or Reserved
= Unimplemented or Reserved
Note 1
PORF
Figure 8-5. S12XECRG Post Divider Register (POSTDIV)
0
0
6
6
Figure 8-6. S12XECRG Flags Register (CRGFLG)
)
S12XS Family Reference Manual Rev. 1.09
Note 2
LVRF
0
0
5
5
PLL
is identical to f
LOCKIF
Note 3
NOTE
0
4
4
VCO
LOCK
0
0
3
3
S12XE Clocks and Reset Generator (S12XECRGV1)
(divide by one).
POSTDIV[4:0]
ILAF
0
0
2
2
SCMIF
0
0
1
1
SCM
0
0
0
0
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