SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 499

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SC9S12XS256J1MAA

Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
17.3.2.6
The Reserved 06 is reserved for test purposes.
17.3.2.7
The VREGHTTR register allows to trim the VREG temperature sense.
Freescale Semiconductor
0x02F6
0x02F7
Fiption
1. Reset value is either 0 or preset by factory. See Section 1 (Device Overview) for details.
HTTR[3:0]
HTOEN
Reset
Reset
Field
3–0
7
W
W
R
R
HTOEN
High Temperature Offset Enable Bit — If set the temperature sense offset is enabled
0 The temperature sense offset is disabled
1 The temperature sense offset is enabled
Reserved 06
High Temperature Trimming Register (VREGHTTR)
High Temperature Trimming Bits — See
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
HTTR[3]
HTTR[2]
HTTR[1]
HTTR[0]
0
0
0
0
6
6
Bit
Table 17-11. VREGHTTR field descriptions
S12XS Family Reference Manual, Rev. 1.09
Increases V
Increases V
Increases V
Increases V
0
0
0
0
5
5
Table 17-12. Trimming Effect
Figure 17-7. Reserved 06
Figure 17-8. VREGHTTR
HT
HT
HT
HT
twice of HTTR[2]
twice of HTTR[1]
twice of HTTR[0]
(to compensate Temperature Offset)
Table 23-16
0
0
0
0
4
4
Trimming Effect
Description
for trimming effects.
HTTR3
0
0
0
3
3
1
HTTR2
0
0
0
2
2
1
Voltage Regulator (S12VREGL3V3V1)
HTTR1
0
0
0
1
1
1
HTTR0
0
0
0
0
0
1
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