SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 459
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SC9S12XS256J1MAA
Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.SC9S12XS256J1MAA.pdf
(736 pages)
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Chapter 16
Timer Module (TIM16B8CV2) Block Description
16.1
The basic timer consists of a 16-bit, software-programmable counter driven by a enhanced programmable
prescaler.
This timer can be used for many purposes, including input waveform measurements while simultaneously
generating an output waveform. Pulse widths can vary from microseconds to many seconds.
This timer contains 8 complete input capture/output compare channels and one pulse accumulator. The
input capture function is used to detect a selected transition edge and record the time. The output compare
function is used for generating output signals or for timer software delays. The 16-bit pulse accumulator
Freescale Semiconductor
Revision
Number
V02.04
V02.05
V02.06
Introduction
Revision Date
26 Aug 2009
1 Jul 2008
9 Jul 2009
16.3.2.2/16-466
16.3.2.3/16-467
16.3.2.4/16-468
16.4.2/16-483
16.4.3/16-483
16.4.2/16-483
16.4.3/16-483
16.1.2/16-460
16.4.3/16-483
16.3.2.12/16-
16.3.2.13/16-
16.3.2.16/16-
16.3.2.12/16-
16.3.2.13/16-
16.3.2.15/16-
16.3.2.16/16-
16.3.2.19/16-
16.3.2.15/16-
Sections
Affected
474
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S12XS Family Reference Manual, Rev. 1.09
Table 16-1. Revision History
- Revised flag clearing procedure, whereby TEN bit must be set when clearing
flags.
- Revised flag clearing procedure, whereby TEN or PAEN bit must be set
when clearing flags.
- Add fomula to describe prescaler
- Correct typo: TSCR ->TSCR1
- Correct reference: Figure 1-25 -> Figure 1-31
- Add description, “a counter overflow when TTOV[7] is set”, to be the
condition of channel 7 override event.
- Phrase the description of OC7M to make it more explicit
Description of Changes
459
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