SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 233

• Manufacturer Part Number: SC9S12XS256J1MAA
• Description: HCS12 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Chapter 8
S12XE Clocks and Reset Generator (S12XECRGV1)
8.1
This specification describes the function of the Clocks and Reset Generator (S12XECRG).
8.1.1
The main features of this block are:
Freescale Semiconductor
Revision
Number
V01.00
V01.01
V01.02
V01.03
V01.04
V01.05
•
•
•
•
Phase Locked Loop (IPLL) frequency multiplier with internal filter
— Reference divider
— Post divider
— Configurable internal filter (no external pin)
— Optional frequency modulation for defined jitter and reduced emission
— Automatic frequency lock detector
— Interrupt request on entry or exit from locked condition
— Self Clock Mode in absence of reference clock
System Clock Generator
— Clock Quality Check
— User selectable fast wake-up from Stop in Self-Clock Mode for power saving and immediate
— Clock switch for either Oscillator or PLL based system clocks
Computer Operating Properly (COP) watchdog timer with time-out clear window.
System Reset generation from the following possible sources:
— Power on reset
Introduction
program execution
Features
19. Sep 2009
20 Nov. 2008
26 Oct. 2005
02 Nov 2006
4 Mar. 2008
1 Sep. 2008
Revision
Date
8.4.1.1/8-250
8.4.1.4/8-253
8.4.3.3/8-257
8.3.2.4/8-239
8.5.1/8-259
Table 8-14
Sections
Affected
S12XS Family Reference Manual, Rev. 1.09
Table 8-1. Revision History
Initial release
Table “Examples of IPLL Divider settings”: corrected $32 to $31
Corrected details
added 100MHz example for PLL
S12XECRG Flags Register: corrected address to Module Base + 0x0003
Modified Note below
Table 8-17./8-259
Description of Changes
233