C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 156
C509-L_97
Manufacturer Part Number
C509-L_97
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C509-L_97.pdf
(290 pages)
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6.4.3
The general mechanism to start an MDU activity has been described above. The following
description of the write and read sequences adds to the information given in the table below where
the write and read operations necessary for a multiplication or division are listed.
Table 6-10
Programming the MDU for Multiplication and Division
Operation
First Write
Last Write
First Read
Last Read
Abbreviations :
D'end
D'or
M'and
M'or
Pr
Rem
Quo
...L
...H
Write Sequence
The first and the last write operation in phase one are fixed for every calculation of the MDU. All
write operations inbetween determine the type of MDU calculation.
Read Sequence
Semiconductor Group
– A write-to-MD0 is the first transfer to be done in any case. This write resets the MDU and
– The next two or three write operations select the calculation type (32bit/16bit, 16bit/16bit,
– Any read-out of the MDx registers should begin with MD0
– The last read from MD5 (division) or MD3 (multiplication) determines the end of a whole
triggers the error flag mechanism (see below).
16bit x 16bit)
The last write-to-MD5 finally starts the selected MUL/DIV operation
calculation and releases the error flag mechanism.
Multiplication/Division
: Dividend, 1st operand of division
: Divisor, 2nd operand of division
: Multiplicand, 1st operand of multiplication
: Multiplicator, 2nd operand of multiplication
: Product, result of multiplication
: Remainder
: Quotient, result of division
: means, that this byte is the least significant of the 16-bit or 32-bit operand
: means, that this byte is the most significant of the 16-bit or 32-bit operand
32Bit/16Bit
MD0
MD1
MD2
MD3
MD4
MD5
MD0
MD1
MD2
MD3
MD4
MD5
D’endL
D’end
D’end
D’endH
D’orL
D’orH
QuoL
Quo
Quo
QuoH
RemL
RemH
6-78
16Bit/16Bit
MD0
MD1
MD4
MD5
MD0
MD1
MD4
MD5
On-Chip Peripheral Components
D’endL
D’endH
D’orL
D’orH
QuoL
QuoH
RemL
RemH
16Bit x 16Bit
MD0
MD4
MD1
MD5
MD0
MD1
MD2
MD3
M’andL
M’orL
M’andH
M’orH
PrL
PrH
1997-10-01
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