C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 36

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C509-L_97

Manufacturer Part Number
C509-L_97
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Bit
PRGEN0
SWAP
Semiconductor Group
Function
Program Enable Bit 0
The PRGEN0 bit is a read-only bit and represents the logic level of the external
PRGEN pin.
PRGEN0 = 1:
PRGEN0 = 0:
Notes: Clearing the PRGEN0 bit by changing the logic level at the PRGEN pin in
Swap Code- and Data Memory
SWAP = 0:
SWAP = 1:
the Normal Mode disables write accesses to the external FLASH EPROM.
Enable/disable write accesses to external FLASH EPROM can be done by
changing the PRGEN1 bit with a special software unlock sequence.
The data memory and the code memory remain in their predefined
locations.
The following address areas and memory locations are assigned to
code memory:
0000 H - 01FF H
0200 H - F3FF H
F400 H - FFFF H
The following address areas and memory locations ar assigned to
data memory:
0000 H - FFFF H
software control.
The PRGEN1 bit can be set or cleared under software control.
The PRGEN1 bit is held at logic low level and cannot be set under
3-11
Boot ROM
External data memory is swapped to external
code memory
The XRAM is enabled and automatically
mapped into code memory space.
(independent of bit XMAP0 in SFR SYSCON)
External FLASH /ROM/EPROM
The former code memory is assigned as data
memory and is now addressable by using
MOVX instructions.
Memory Organization
1997-10-01
C509-L

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