C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 98
C509-L_97
Manufacturer Part Number
C509-L_97
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C509-L_97.pdf
(290 pages)
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6.2.1
The Timer 0/1 unit of the C509-L is controlled by totally 8 special function registers: TCON, TMOD,
PRSC, IEN0, TL0, TH0, TL1, and TH1.
Each timer consists of two 8-bit registers (TH0 and TL0 for timer/counter 0, TH1 and TL1 for
timer/counter 1) which may be combined to one timer configuration depending on the mode that is
established. The functions of the timers are controlled by two special function registers TCON and
TMOD. The interrupt enable control bits are located in the SFR IEN0.
The upper four bits of the special function register TCON are the run and overflow flags for timer 0
and 1.
Special Function Register TCON (Address. 88 H )
Special Function Register IEN0 (Address. A8 H )
Bit
TF1
TR1
TF0
TR0
ET1
ET0
Semiconductor Group
Bit No.
A8 H
88 H
Timer/Counter 0 / 1 Registers
The shaded bits are not used for timer/counter 0 and 1.
Function
Timer 1 overflow flag
Set by hardware on timer/counter 1 overflow. Cleared by hardware when
processor vectors to interrupt routine.
Timer 1 run control bit.
Set/cleared by software to turn timer/counter 1 on/off.
Timer 0 overflow flag
Set by hardware on timer/counter 0 overflow. Cleared by hardware when
processor vectors to interrupt routine.
Timer 0 run control bit.
Set/cleared by software to turn timer/counter 0 on/off.
Timer 1 overflow interrupt enable.
If ET1 = 0, the timer 1 interrupt is disabled.
Timer 0 overflow interrupt enable.
If ET0 = 0, the timer 0 interrupt is disabled.
MSB
EAL
TF1
8F
AF
H
H
WDT
TR1
AE
8E
H
H
ET2
TF0
8D
AD
H
H
TR0
ES0
8C
AC
H
H
6-20
ET1
IE1
8B
AB
H
H
On-Chip Peripheral Components
EX1
IT1
AA
8A
H
H
ET0
IE0
A9
89
H
H
LSB
EX0
IT0
A8
88
H
H
Reset Value : 00 H
Reset Value : 00 H
IEN0
TCON
1997-10-01
C509-L
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