C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 64

• Manufacturer Part Number: C509-L_97
• Description: 8-Bit CMOS Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

4.4.2
The XRAM can be accessed by two read/write instructions, which use the 16-bit DPTR for indirect
addressing. These instructions are:
For accessing the XRAM, the effective address stored in DPTR must be in the range of F400 H to
FFFF H .
4.4.3 Accesses to XRAM using the Registers R0/R1
The 8051 architecture provides also instructions for accesses to external data memory range which
use only an 8-bit address (indirect addressing with registers R0 or R1). The instructions are:
In application systems, either a real 8-bit bus (with 8-bit address) is used or Port 2 serves as page
register which selects pages of 256-Byte. However, the distinction, whether Port 2 is used as
general purpose I/0 or as “page address” is made by the external system design. From the device's
point of view it cannot be decided whether the Port 2 data is used externally as address or as I/0
data.
Hence, a special page register is implemented into the C509-L to provide the possibility of
accessing the XRAM also with the MOVX @Ri instructions, i.e. XPAGE serves the same function
for the XRAM as Port 2 for external data memory.
Special Function Register XPAGE (Address 91 H )
Bit
XPAGE.7-0
Figures 4-4 and 4-6 show the dependencies of XPAGE- and Port 2 - addressing in order to explain
the differences in accessing XRAM/CAN controller, ext. RAM or what is to do when Port 2 is used
as an I/O-port.
Semiconductor Group
– MOVX
– MOVX
91 H
Accesses to XRAM using the DPTR (16-bit Addressing Mode)
Bit No. MSB
MOVX
MOVX
A, @DPTR
@DPTR, A
7
.7
A, @ Ri
@Ri, A
Function
XRAM high address
XPAGE.7-0 is the address part A15-A8 when 8-bit MOVX instructions are
used to access the internal XRAM.
6
.6
(Read)
(Write)
(Read)
(Write)
.5
5
.4
4
4-12
.3
3
.2
2
External Bus Interface
.1
1
LSB
.0
0
Reset Value : 00 H
XPAGE
1997-10-01
C509-L