C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 234

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C509-L_97

Manufacturer Part Number
C509-L_97
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Table 9-2
Status of all Pins During Hardware Power Down Mode
Pins
P0, P1, P2, P3, P4,
P5, P6, P7, P8, P9
EA
PE/SWD
XTAL1
XTAL2
PSEN/RDF, ALE
VAREF, VAGND
OWE
RESET
R0
The power down state is maintained while pin HWPD is held active. If HWPD goes to high level
(inactive state) an automatic start up procedure is performed:
The SWD-Function of the PE/SWD pin is sampled only by a hardware reset. Therefore at least one
Power On Reset has to be performed.
Semiconductor Group
– First the pins leave their floating condition and enter their default reset state as they had
– Both oscillators are enabled (only if OWE = high). While the on-chip oscillator (with pins
– Because the oscillator watchdog is active it detects a failure condition if the on-chip oscillator
– Finally, when the on-chip oscillator has started, the oscillator watchdog releases the part from
immediately before going to float state.
XTAL1 and XTAL2) usually needs a longer time for start-up, if not externally driven (with
crystal approx. 1 ms), the oscillator watchdog's RC oscillator has a very short start-up time
(typ. less than 2 microseconds).
hasn't yet started. Hence, the watchdog keeps the part in reset and supplies the internal clock
from the RC oscillator.
reset after it performed a final internal reset sequence and switches the clock supply to the
on-chip oscillator. This is exactly the same procedure as when the oscillator watchdog detects
first a failure and then a recovering of the oscillator during normal operation. Therefore, also
the oscillator watchdog status flag is set after restart from hardware power down mode.
When automatic start of the watchdog was enabled (PE/SWD connected to
Watchdog Timer will start, too (with its default reload value for time-out period).
Status
Floating outputs / disabled input function
active input
active input, pull-up resistor disabled
during HW power down
active output
disabled input function
Floating outputs / disabled input function
(for test modes only)
active supply pins
active input; must be at high level for start-
up after HW power down; pull up resistor
disabled during HW-power down
active input; must be on high level if HW
power down is used
Floating output
9-9
Voltage Range at Pin During
HW-Power Down
V
V
V
pin may not be driven
V
V
V
V
or
(
V
V
V
SS
IN
IN
SS
SS
AGnd
IN
IN
SS
IN
=
=
=
=
=
Power Saving Modes
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
IN
IN
IN
IN
V
SS
IN
)
or
or
V
V
V
V
CC
V
V
CC
CC
V
CC
IN
IN
CC
=
=
V
V
SS
SS
1997-10-01
V
C509-L
CC
), the

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