C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 182

• Manufacturer Part Number: C509-L_97
• Description: 8-Bit CMOS Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

6.6
The C509-L includes a high performance / high speed 10-bit A/D-Converter (ADC) with 15 analog
input channels. This A/D converter operates with a successive approximation technique and uses
self calibration mechanisms for reduction and compensation of offset and linearity errors. The A/D
converter provides the following features:
For the conversion, the method of successive approximation via capacitor array is used. The
externally applied reference voltage range has to be held on a fixed value within the specifications.
Figure 6-47 shows a block diagram of the A/D converter. There are four user-accessible special
function registers, ADCON1/ADCON0 (A/D converter control registers) and ADDATH/ADDATL
(A/D converter data registers). The analog input channels (port 7 and port 8) can also be used for
digital input. For interrupt processing of the A/D converter, two bits are located in the special
function registers IEN2 and IRCON0.
6.6.1 A/D Converter Operation
An internal start of a single A/D conversion is triggered by a write-to-ADDATL instruction. The start
procedure itself is independent of the value which is written to ADDATL. When single conversion
mode is selected (bit ADM=0) only one A/D conversion is performed. In continuous mode (bit
ADM=1), after completion of an A/D conversion a new A/D conversion is triggered automatically
until bit ADM is reset.
An externally controlled conversion can be achieved by setting the bit ADEX. In this mode one
single A/D conversion is triggered by a 1-to-0 transition at pin P6.0/ADST (when ADM is 0).
P6.0/ADST is sampled during S5P2 of every machine cycle. When the samples show a logic high
in one cycle and a logic low in the next cycle the transition is detected and the A/D conversion is
started. When ADM and ADEX is set, a continuous conversion is started when pin P6.0/ADST sees
a low level. Only if no A/D conversion (single or continuous) has occurred after the last reset
operation, a 1-to-0 transition is required at pin P6.0/ADST for starting the continuous conversion
mode externally. The continuous A/D conversion is stopped when the pin P6.0/ADST goes back to
high level. The last running A/D conversion during P6.0/ADST low level will be completed.
The busy flag BSY (ADCON0.4) is automatically set when an A/D conversion is in progress. After
completion of the conversion it is reset by hardware. This flag can be read only, a write has no
effect. The interrupt request flag IADC (IRCON0.0) is set when an A/D conversion is completed.
Semiconductor Group
– 15 multiplexed input channels, which can also be used as digital inputs (port 7, port 8)
– 10-bit resolution
– Single or continuous conversion mode
– Internal or external start-of-conversion trigger capability
– Programmable conversion and sample clock
– Interrupt request generation after each conversion
– Using successive approximation conversion technique via a capacitor array
– Built-in hidden calibration of offset and linearity errors
A/D Converter
6-104
On-Chip Peripheral Components
1997-10-01
C509-L