C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 77

• Manufacturer Part Number: C509-L_97
• Description: 8-Bit CMOS Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

5.6
For peripheral devices requiring a system clock, the C509-L provides a clock output signal derived
from the oscillator frequency as an alternate output function on pin P1.6/CLKOUT. lf bit CLK is set
(bit 6 of special function register ADCON0), a clock signal with 1/6 or 1/12 of the oscillator frequency
(depending on bit CLKP in SFR SYSCON) is gated to pin P1.6/CLKOUT. To use this function the
port pin must be programmed to a one (1), which is also the default after reset.
Special Function Register ADCON0 (Address D8 H )
Special Function Register SYSCON (Address B1 H )
Bit
CLK
CLKP
A timing diagram of the system clock output is shown in figure 5-7. This timing assumes that CLK=1
and CLKP=0.
Note : During slow-down operation the frequency of the CLKOUT signal is further divided by eight.
Semiconductor Group
Bit No.
System Clock Output
D8 H
B1 H
CLKP PMOD EALE RMAP
MSB
DF H
BD
These bits are not used in controlling the clock output function.
7
Function
Clock output enable bit
When set, pin P1.6/CLKOUT outputs the system clock which is 1/6 or 1/12 of
the oscillator frequency.
Prescaler control for the clock output signal CLKOUT
CLKP = 0 : CLKOUT frequency is f
CLKP = 1 : CLKOUT frequency is f
CLK
DE H
6
ADEX
DD H
5
BSY
DC H
4
5-8
ADM
DB H
–
3
OSC
OSC
MX2
DA H
–
2
/6
/12 (default after reset)
XMAP1 XMAP0
MX1
D9 H
1
Reset / System Clock
Reset Value : 1010XX01 B
LSB
MX0
D8 H
0
Reset Value : 00 H
ADCON0
SYSCON
1997-10-01
C509-L