C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 194
C509-L_97
Manufacturer Part Number
C509-L_97
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C509-L_97.pdf
(290 pages)
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6.6.5 Adjustment of the Sample Time
As already discussed, the maximum input clock f
taken into account when programming the A/D converter input clock prescalers. Additionally, the
C509-L allows to adapt the sample phase of an A/D conversion to the impedance of an analog input
source. This chapter gives some hints how an optimal adaption of the sample phase is achieved.
At the end of an A/D conversion (single conversion mode) the internal capacitor array is internally
precharged to a voltage level between V
conversion of an analog voltage U
raises) shortly to the precharge voltage level U
RC load curve (see figure 6-51).
Figure 6-51
Typical Wavefoms at the Analog Inputs During the Sample Phase
The characteristics of the RC load curves as shown in figure 6-51 a) and b) is determined by the
input capacitance C
by the voltage difference between U
The external analog source needs to be strong enough (low impedance) to source the current for
loading the analog input capacitance. Depending on the accuracy or error requirements of an A/D
conversion, the limits for the input impedance of the analog source can be calculated using the
following formula :
Table 6-14 shows the resulting maximum values for R
of 0.1% (1 or 2 LSB error allowed, additional to the specified total unadjusted error).
Semiconductor Group
R
t
C
error : allowed deviation of U
S
IN
MAX
:
:
IN
= - t
sample time
analog input capacitance (typically 50 pF)
of the analog input pin, by the impedance R of the driving analog source, and
S
/ (C
IN
• In (error) )
0
0
is started, the voltage level at the analog input pin drops (or
and U
P
IN
AGND
.
P
6-116
from U
and then raises (or drops) back to U
ADC
with
and V
0
for the A/D converter is 2 MHz. This must be
MAX
On-Chip Peripheral Components
at the end of the sample time, given in %
error = 1 -
AREF
at f
OSC
(approx. 2-3 V). When an A/D
= 16 MHz and a maximum error
u(t)
U
0
0
with a typical
1997-10-01
C509-L
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