C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 28

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C509-L_97

Manufacturer Part Number
C509-L_97
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Reset initializes the stack pointer to location 07 H and increments it once to start from location 08 H
which is also the first register (R0) of register bank 1. Thus, if one is going to use more than one
register bank, the SP should be initialized to a different location of the RAM which is not used for
data storage.
3.4
The C509-L can operate in four different operating modes (chipmodes) with different program and
data memory organizations:
Table 3-1 describes the program and data memory areas which are available in the different
chipmodes of the C509-L. It also shows the control bits of SFR SYSCON1, which are used for the
software selection of the chipmodes.
Table 3-1
Overview of Program and Data Memory Organization
Operating Mode
(Chipmode)
Normal Mode
XRAM Mode
Bootstrap Mode
Programming Mode
Semiconductor Group
– Normal Mode
– XRAM Mode
– Bootstrap Mode
– Programming Mode
Program and Data Memory Organization
Program Memory
Ext.
0000 H -
FFFF H
0200 H -
F3FF H
0200 H -
F3FF H
0200 H -
FFFF H
Int.
0000 H -
01FF H =
Boot ROM;
F400 H -
FFFF H =
(XRAM)
0000 H -
01FF H =
Boot ROM
0000 H -
01FF H =
Boot ROM;
F400 H -
FFFF H =
XRAM
3-3
Data Memory
Ext.
0000 H -
F3FF H
0000 H -
FFFF H
(read only)
0000 H -
F3FF H
0000 H -
FFFF H
(read and
write)
Int.
F400 H -
FFFF H
(XRAM)
F400 H
FFFF H
(XRAM)
Memory Organization
-
SYSCON1 Bits
PRGEN
1
0
0
1
1
1997-10-01
SWAP
0
1
0
1
C509-L

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