C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 84

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C509-L_97

Manufacturer Part Number
C509-L_97
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
In fact, the pullups mentioned before and included in figure 6-3 are pullup arrangements as shown
in figure 6-4. One n-channel pulldown FET and three pullup FETs are used:
Figure 6-4
Output Driver Circuit of Ports 1 to 6 and 9
Semiconductor Group
– The pulldown FET n1 is of n-channel type. It is a very strong driver transistor which is capable
– The pullup FET p1 is of p-channel type. It is activated for one state (S1) if a 0-to-1 transition
– The pullup FET p2 is of p-channel type. It is always activated when a “1” is in the port latch,
– The pullup FET p3 is of p-channel type. It is only activated if the voltage at the port pin is
of sinking high currents (
circuit to
the FET. This also means that no “0” must be programmed into the latch of a pin that is used
as input.
is programmed to the port pin, i.e. a “1” is programmed to the port latch which contained a “0”.
The extra pullup can drive a similar current as the pulldown FET n1. This provides a fast
transition of the logic levels at the pin.
thus providing the logic high output level. This pullup FET sources a much lower current than
p1; therefore the pin may also be tied to ground, e.g. when used as input with logic low input
level.
higher than approximately 1.0 to 1.5 V. This provides an additional pullup current if a logic
high level shall be output at the pin (and the voltage is not forced lower than approximately
1.0 to 1.5 V). However, this transistor is turned off if the pin is driven to a logic low level, e.g
when used as input. In this configuration only the weak pullup FET p2 is active, which sources
the current
(
with a low level applied. However, the driving capability is stronger if a logic high level is
output.
Q
Input Data
(Read Pin)
I
TL
). Thus, an additional power consumption can be avoided if port pins are used as inputs
V
CC
I
=1
IL
must be avoided if the transistor is turned on, since the high current might destroy
. If, in addition, the pullup FET p3 is activated, a higher current can be sourced
Delay = 1 State
I
OL
); it is only activated if a “0” is programmed to the port pin. A short
<
=1
_
1
6-6
On-Chip Peripheral Components
V
SS
p1
n1
p2
=1
V
CC
p3
MCS03230
1997-10-01
Port
Pin
C509-L

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