ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 130
ATMEga64L
Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA64L.pdf
(363 pages)
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ATmega64(L)
Figure 56. Timer/Counter Timing Diagram, Setting of OCFnx, with Prescaler (f
Figure 57 shows the count sequence close to TOP in various modes. When using phase
and frequency correct PWM mode the OCRnx Register is updated at BOTTOM. The
timing diagrams will be the same, but TOP should be replaced by BOTTOM, TOP-1 by
BOTTOM+1 and so on. The same renaming applies for modes that set the TOVn flag at
BOTTOM.
Figure 57. Timer/Counter Timing Diagram, no Prescaling
Figure 58 shows the same timing data, but with the prescaler enabled.
TCNTn
OCRnx
OCFnx
(PC and PFC PWM)
(clk
and ICFn
(CTC and FPWM)
clk
clk
TOVn
(Update at TOP)
I/O
I/O
Tn
TCNTn
TCNTn
OCRnx
as TOP)
/8)
(clk
clk
clk
I/O
(FPWM)
I/O
Tn
/1)
(if used
OCRnx - 1
TOP - 1
TOP - 1
Old OCRnx Value
OCRnx
OCRnx Value
TOP
TOP
OCRnx + 1
BOTTOM
TOP - 1
New OCRnx Value
2490G–AVR–03/04
OCRnx + 2
BOTTOM + 1
TOP - 2
clk_I/O
/8)
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