ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 301
ATMEga64L
Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA64L.pdf
(363 pages)
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Programming the EEPROM
Reading the Flash
2490G–AVR–03/04
The EEPROM is organized in pages, see Table 125 on page 296. When programming
the EEPROM, the program data is latched into a page buffer. This allows one page of
data to be programmed simultaneously. The programming algorithm for the EEPROM
data memory is as follows (refer to “Programming the Flash” on page 298 for details on
Command, Address and Data loading):
1. A: Load Command “0001 0001”.
2. G: Load Address High Byte (0x00 - 0xFF).
3. B: Load Address Low Byte (0x00 - 0xFF).
4. C: Load Data (0x00 - 0xFF).
5. E: Latch data (give PAGEL a positive pulse).
K: Repeat 3 through 5 until the entire buffer is filled.
L: Program EEPROM page
1. Set BS1 to “0”.
2. Give WR a negative pulse. This starts programming of the EEPROM page.
3. Wait until to RDY/BSY goes high before programming the next page.
Figure 141. Programming the EEPROM Waveforms
The algorithm for reading the Flash memory is as follows (refer to “Programming the
Flash” on page 298 for details on Command and Address loading):
1. A: Load Command “0000 0010”.
2. G: Load Address High Byte (0x00 - 0xFF).
3. B: Load Address Low Byte (0x00 - 0xFF).
4. Set OE to “0”, and BS1 to “0”. The Flash word low byte can now be read at DATA.
5. Set BS to “1”. The Flash word high byte can now be read at DATA.
6. Set OE to “1”.
RESET +12V
RDY/BSY goes low.
(See Figure 141 for signal waveforms.)
RDY/BSY
PAGEL
XTAL1
DATA
XA1
XA0
BS1
BS2
WR
OE
0x11
A
ADDR. HIGH
G
ADDR. LOW
B
DATA
C
E
XX
ADDR. LOW
B
DATA
K
C
XX
E
ATmega64(L)
L
301
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