ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 331

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ATMEga64L

Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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SPI Timing
Characteristics
2490G–AVR–03/04
Table 135. SPI Timing Parameters
Note:
Figure 157. SPI Interface Timing Requirements (Master Mode)
(Data Output)
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
(Data Input)
(CPOL = 0)
(CPOL = 1)
MISO
MOSI
Description
1. In SPI Programming mode the minimum SCK high/low period is:
SCK
SCK
SS
SS high to tri-state
SCK to out high
SCK to SS high
- 2 t
- 3 t
SCK high/low
SS low to SCK
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
SCK period
Out to SCK
SCK period
SCK to out
SCK to out
CLCL
CLCL
Setup
Setup
Hold
Hold
for f
for f
6
4
MSB
CK
CK
(1)
< 12 MHz
>12 MHz
5
MSB
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
7
...
4 • t
2 • t
Min
...
10
t
20
20
ck
ck
ck
50% duty cycle
See Table 72
0.5 • t
2
TBD
TBD
Typ
10
10
10
10
15
15
10
ATmega64(L)
LSB
sck
1
LSB
2
Max
3
8
ns
331

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