ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 256

• Manufacturer Part Number: ATMEga64L
• Description: 8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
• Manufacturer: ATMEL Corporation

Reset Register
Boundary-scan Chain
Boundary-scan Specific
JTAG Instructions
EXTEST; 0x0
256
ATmega64(L)
The Reset Register is a Test Data Register used to reset the part. Since the AVR tri-
states port pins when reset, the Reset Register can also replace the function of the
unimplemented optional JTAG instruction HIGHZ.
A high value in the Reset Register corresponds to pulling the External Reset low. The
part is reset as long as there is a high value present in the Reset Register. Depending
on the Fuse settings for the clock options, the part will remain reset for a Reset Time-out
Period (refer to “Clock Sources” on page 36) after releasing the Reset Register. The
output from this data register is not latched, so the reset will take place immediately, as
shown in Figure 126.
Figure 126. Reset Register
The Boundary-scan Chain has the capability of driving and observing the logic levels on
the digital I/O pins, as well as the boundary between digital and analog logic for analog
circuitry having Off-chip connections.
See “Boundary-scan Chain” on page 258 for a complete description.
The instruction register is 4-bit wide, supporting up to 16 instructions. Listed below are
the JTAG instructions useful for Boundary-scan operation. Note that the optional HIGHZ
instruction is not implemented, but all outputs with tri-state capability can be set in high-
impedant state by using the AVR_RESET instruction, since the initial state for all port
pins is tri-state.
As a definition in this datasheet, the LSB is shifted in and out first for all Shift Registers.
The OPCODE for each instruction is shown behind the instruction name in hex format.
The text describes which data register is selected as path between TDI and TDO for
each instruction.
Mandatory JTAG instruction for selecting the Boundary-scan Chain as data register for
testing circuitry external to the AVR package. For port-pins, Pull-up Disable, Output
Control, Output Data, and Input Data are all accessible in the scan chain. For analog cir-
cuits having Off-chip connections, the interface between the analog and the digital logic
is in the scan chain. The contents of the latched outputs of the Boundary-scan Chain is
driven out as soon as the JTAG IR-Register is loaded with the EXTEST instruction.
From Other Internal and
External Reset Sources
From
ClockDR · AVR_RESET
TDI
D
Q
TDO
To
Internal Reset
2490G–AVR–03/04