ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 55
ATMEga64L
Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA64L.pdf
(363 pages)
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Watchdog Timer Control
Register – WDTCR
2490G–AVR–03/04
Table 21. WDT Configuration as a Function of the Fuse Settings of M103C and
WDTON
Figure 28. Watchdog Timer
• Bits 7..5 – Res: Reserved Bits
These bits are reserved bits in the ATmega64 and will always read as zero.
• Bit 4 – WDCE: Watchdog Change Enable
This bit must be set when the WDE bit is written to logic zero. Otherwise, the Watchdog
will not be disabled. Once written to one, hardware will clear this bit after four clock
cycles. Refer to the description of the WDE bit for a Watchdog disable procedure. In
Safety Level 1 and 2, this bit must also be set when changing the prescaler bits. See
“Timed Sequences for Changing the Configuration of the Watchdog Timer” on page 58.
Bit
Read/Write
Initial Value
M103C
Unprogrammed
Unprogrammed
Programmed
Programmed
R
7
–
0
WDTON
Unprogrammed
Programmed
Unprogrammed
Programmed
OSCILLATOR
WATCHDOG
R
6
–
0
R
5
–
0
Safety
Level
1
2
0
2
WDCE
R/W
4
0
WDT
Initial
State
Disabled
Enabled
Disabled
Enabled
WDE
R/W
3
0
WDP2
R/W
How to
Disable the
WDT
Timed
sequence
enabled
Timed
sequence
Always
enabled
Always
2
0
ATmega64(L)
WDP1
R/W
1
0
WDP0
R/W
How to
Change
Time-out
Timed
sequence
Timed
sequence
No restriction
Timed
sequence
0
0
WDTCR
55
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