ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 145
ATMEga64L
Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA64L.pdf
(363 pages)
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Definitions
Timer/Counter Clock
Sources
2490G–AVR–03/04
The double buffered Output Compare Register (OCR2) is compared with the
Timer/Counter value at all times. The result of the compare can be used by the Wave-
form Generator to generate a PWM or variable frequency output on the Output Compare
pin (OC2). For details, see “Output Compare Unit” on page 146. The Compare Match
event will also set the Compare Flag (OCF2) which can be used to generate an Output
Compare interrupt request.
Many register and bit references in this document are written in general form. A lower
case “n” replaces the Timer/Counter number, in this case 2. However, when using the
register or bit defines in a program, the precise form must be used (i.e., TCNT2 for
accessing Timer/Counter2 counter value and so on).
The definitions in Table 63 are also used extensively throughout this section.
Table 63. Definitions
The Timer/Counter can be clocked by an internal or an external clock source. The clock
source is selected by the Clock Select logic which is controlled by the Clock Select
(CS22:0) bits located in the Timer/Counter Control Register (TCCR2). For details on
clock sources and prescaler, see “Timer/Counter3, Timer/Counter2 and Timer/Counter1
Prescalers” on page 142.
BOTTOM
MAX
TOP
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest
value in the count sequence. The TOP value can be assigned to be the
fixed value 0xFF (MAX) or the value stored in the OCR2 Register. The
assignment is dependent on the mode of operation.
ATmega64(L)
145
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