ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 169

• Manufacturer Part Number: ATMEga64L
• Description: 8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
• Manufacturer: ATMEL Corporation

USART
Dual USART
Overview
2490G–AVR–03/04
The Universal Synchronous and Asynchronous serial Receiver and Transmitter
(USART) is a highly flexible serial communication device. The main features are:
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The ATmega64 has two USART’s, USART0 and USART1. The functionality for both
USART’s is described below. USART0 and USART1 have different I/O Registers as
shown in “Register Summary” on page 342. Note that in ATmega103 compatibility
mode, USART1 is not available, neither is the UBRR0H or UCRS0C registers. This
means that in ATmega103 compatibility mode, the ATmega64 supports asynchronous
operation of USART0 only.
A simplified block diagram of the USART Transmitter is shown in Figure 79. CPU acces-
sible I/O Registers and I/O pins are shown in bold.
Figure 79. USART Block Diagram
Note:
Full Duplex Operation (Independent Serial Receive and Transmit Registers)
Asynchronous or Synchronous Operation
Master or Slave Clocked Synchronous Operation
High Resolution Baud Rate Generator
Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
Odd or Even Parity Generation and Parity Check Supported by Hardware
Data OverRun Detection
Framing Error Detection
Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
Three Separate Interrupts on TX Complete, TX Data Register Empty and RX Complete
Multi-processor Communication Mode
Double Speed Asynchronous Communication Mode
1. Refer to Figure 1 on page 2, Table 36 on page 76, and Table 39 on page 79 for
USART pin placement.
UCSRA
TRANSMIT SHIFT REGISTER
RECEIVE SHIFT REGISTER
BAUD RATE GENERATOR
UDR (Transmit)
UDR (Receive)
UBRR[H:L]
(1)
UCSRB
SYNC LOGIC
GENERATOR
RECOVERY
RECOVERY
CHECKER
PARITY
PARITY
CLOCK
DATA
OSC
Clock Generator
ATmega64(L)
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
Transmitter
PIN
PIN
PIN
TX
RX
Receiver
UCSRC
XCK
TxD
RxD
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